A NOVEL UMOS CAPACITOR TEST STRUCTURE FOR SIC DEVICES

Citation
Cm. Zetterling et M. Ostling, A NOVEL UMOS CAPACITOR TEST STRUCTURE FOR SIC DEVICES, Solid-state electronics, 39(9), 1996, pp. 1396-1397
Citations number
6
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied","Physics, Condensed Matter
Journal title
ISSN journal
00381101
Volume
39
Issue
9
Year of publication
1996
Pages
1396 - 1397
Database
ISI
SICI code
0038-1101(1996)39:9<1396:ANUCTS>2.0.ZU;2-A
Abstract
In this paper we propose the use of U-grooved MOS capacitors to invest igate oxides intended for U-grooved MOSFETs and IGBTs in silicon carbi de. The UMOS capacitor uses only two mask layers, and has vertically e tched walls and a gate contact that overlaps the step. We have manufac tured UMOS capacitors in n-type 6H SiC with dry thermal gate oxides, a nd compared the capacitance voltage characteristics to those of hat re ference capacitors. it was found that the general appearance of capaci tance-voltage curves was unchanged by the addition of the vertical gro oves, although the leakage through the oxide was increased. The oxide thickness on the sidewalls was approximately the same as on the flat p arts of the devices. Copyright (C) 1996 Elsevier Science Ltd