MESSAGE-BASED EFFICIENT REMOTE MEMORY ACCESS ON A HIGHLY PARALLEL COMPUTER EM-X

Communication latency is central to multiprocessor design. This study presents the design principles of the EM-X distributed-memory multipro cessor towards tolerating communication latency. The EM-X overlaps com putation with communication for latency tolerance by multithreading. I n particular, we present two types of hardware support for remote memo ry access: (1) priority-based packet scheduling for thread invocation, and (2) direct remote memory access. The priority-based scheduling po licy extends a FIFO ordered thread invocation policy to adopt to diffe rent computational needs. The direct remote memory access is designed to overlap remote memory operations with thread execution. The 80-proc essor prototype of EM-X is developed and is operational since December 1995. We execute several programs on the machine and evaluate how the EM-X effectively overlaps computation with communication toward toler ating communication latency for high performance parallel computing.