HIERARCHICAL TEST-GENERATION UNDER ARCHITECTURAL LEVEL FUNCTIONAL CONSTRAINTS

In hierarchical test generation, the test vectors for the ion level st ructure of the module under test are computed and then justified at a high level. In the module test computation procedure, a low level ATPG tool is conventionally applied to thr complete structure of that part icular module without adding extra information, Due to the architectur al level functional constraints applied to the inputs of that module, many of the test vectors being computed are not justifiable at the hig h level. Therefore, high efficiency cannot be achieved without managin g the functional constraint problem in the hierarchical ATPG process. In this paper, both top-down and bottom-up approaches are addressed. I t is shown that the valid control cone abstraction and lest cube justi fication techniques are very effective to overcome the architectural l evel functional constraint problem and to achieve high efficiency in t est computation. The proposed algorithms have been implemented in our hierarchical ATPG package and promising experimental results have been derived, We conclude that architectural level functional constraints can be efficiently avoided through these techniques.