THE DEVELOPMENT OF A LOW-STRESS POLYSILICON PROCESS COMPATIBLE WITH STANDARD DEVICE PROCESSING

When surface micromachined devices are combined with on-chip circuitry , any high-temperature processing must be avoided to minimize the effe ct on active device characteristics. High-temperature stress annealing cannot be applied to these structures. This work studies the effects of deposition parameters and subsequent processing on the mechanical p roperties of the polysilicon film in the development of a low-strain p olysilicon process, without resorting to high-temperature annealing. T he films are deposited as a semi-amorphous film and then annealed, in situ at 600 degrees C for 1 h, to ensure the desired mechanical charac teristics for both doped and undoped samples. This low temperature ann eal changes the strain levels in undoped films from -250 to +1100 mu e psilon. The best results have been obtained for an 850 degrees C annea l for 30 min which is used to activate the dopant (both phosphorus and boron). No further stress annealing was used, and 850 degrees C does not present problems in terms of thermal budget for the electrical dev ices. It is shown that these mechanical characteristics are achieved b y forming the grain boundaries during subsequent low temperature annea ling, and not during deposition. TEM (transmission electron microscopy ) studies have been used to investigate the link between the structure and mechanical strain. This has shown that it is the formation of the grain boundary rather than the grain size which has a significant eff ect on strain levels, contrary to reports in the literature. Using the above-mentioned deposition process, a series of experiments have been performed to establish the flexibility in subsequent processing avail able to the designer. Therefore, by careful consideration of the proce ssing, a low-temperature polysilicon process, which can be used to fab ricate thin micromachined structures, has been developed.