FULLY SELF-ALIGNED DOUBLE MESA SIGE-HBT WITH EXTERNAL TRANSISTOR OPTIMIZATION

A significant reduction in parasitic resistances and capacitances of t he double mesa SiGe-HBT was achieved using several self-aligning proce sses, such as planarisation for transistor contacts, outside-spacer-te chnology for micromasking, contact implantations and low ohmic silicid es. The authors present and analyse the lateral optimisation by on-waf er measurements and simulations. It is shown that the fully self-align ed transistor combines the advantages of superior high frequency chara cteristics with a simple and low cost realisation procedure.