IMPROVED LOCOS ISOLATION FOR THIN-FILM SOI MOSFETS

Citation
Jp. Colinge et al., IMPROVED LOCOS ISOLATION FOR THIN-FILM SOI MOSFETS, Electronics Letters, 32(19), 1996, pp. 1834-1835
Citations number
5
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
00135194
Volume
32
Issue
19
Year of publication
1996
Pages
1834 - 1835
Database
ISI
SICI code
0013-5194(1996)32:19<1834:ILIFTS>2.0.ZU;2-1
Abstract
The authors propose the use of a recessed LOCOS technique instead of a standard LOCOS process to eliminate parasitic edge transistor leakage in thin-film SOI MOSFETs. This technique helps to increase the sidewa ll threshold voltage by both avoiding excess boron segregation into th e field oxide, and providing a smoother edge rounding than that obtain ed by a classical LOCOS process.