A HYPER OPTIMAL ENCODING SCHEME FOR SELF-CHECKING CIRCUITS

A typical self-checking circuit has an unordered code encoded output. The optimal scheme needs [log (r + 1)] check bits, where r is the numb er of unique weights in all output patterns. A hyper optimal scheme fo r self-checking output encoding is proposed in this paper where the nu mber of check bits will be further reduced in some cases. Two algorith ms are presented to search for the hidden m-out-of-n code words. The h idden m-out-of-n code words are found when all unique output patterns, specified by the circuit specification, in the n selected output bits have exactly m is. The output bits that belong to the hidden m-out-of -n code words are then excluded from further encoding. Typically, the number of added check bits of the proposed technique ranges from 0 to [log (p + 1)], where rho less than or equal to r. When hidden m-out-of -n code words exist, applying the proposed scheme usually results in s ignificant hardware cost and delay time reduction. In the five MCNC FS M benchmark circuits that have been identified with hidden m-out-of-n code words, 10% to 41% hardware reductions are exhibited compared to t he theoretically optimal separable code encoding scheme. In addition, 7% to 45% reductions in checking delays are demonstrated for the same circuits compared to the separable code encoding scheme.