SCHEDULING DIVISIBLE LOADS IN BUS NETWORKS WITH ARBITRARY PROCESSOR RELEASE TIMES

The problem of processing divisible loads in a distributed bus network architecture with arbitrary processor available/release times is cons idered. The objective is to optimally distribute the load among the pr ocessors in the system in such a way that the processing time of the e ntire load is a minimum. Different cases of release time distributions are considered. First, we present the analysis for the case in which the processors are assumed to be available from the time instant at wh ich the processing load arrives at the system. In this case, a multi-i nstallment load distribution strategy is adopted. We develop basic rec ursive equations for the case when the processors in the system are he terogeneous and extend the analysis to the case of homogeneous process ors. Then the case of arbitrary processor release times is considered. Closed-form solutions for the processing time when the processor rele ase times are identical are derived. For a general case of arbitrary p rocessor release times, a heuristic algorithm is presented. All the ca ses are demonstrated through several illustrative examples.