V. Tiwari et al., INSTRUCTION LEVEL POWER ANALYSIS AND OPTIMIZATION OF SOFTWARE, Journal of VLSI signal processing systems for signal, image, and video technology, 13(2-3), 1996, pp. 223-238
Citations number
29
Categorie Soggetti
Computer Sciences, Special Topics","Engineering, Eletrical & Electronic","Computer Science Information Systems
The increasing popularity of power constrained mobile computers and em
bedded computing applications drives the need for analyzing and optimi
zing power in all the components of a system. Software constitutes a m
ajor component of today's systems, and its role is projected to grow e
ven further. Thus, an ever increasing portion of the functionality of
today's systems is in the form of instructions, as opposed to gates. T
his motivates the need for analyzing power consumption from the point
of view of instructions-something that traditional circuit and gate le
vel power analysis tools are inadequate for. This paper describes an a
lternative, measurement based instruction level power analysis approac
h that provides an accurate and practical way of quantifying the power
cost of software. This technique has been applied to three commercial
, architecturally different processors. The salient results of these a
nalyses are summarized. Instruction level analysis of a processor help
s in the development of models for power consumption of software execu
ting on that processor. The power models for the subject processors ar
e described and interesting observations resulting from the comparison
of these models are highlighted. The ability to evaluate software in
terms of power consumption makes it feasible to search for low power i
mplementations of given programs. In addition, it can guide the develo
pment of general tools and techniques for low power software. Several
ideas in this regard as motivated by the power analysis of the subject
processors are also described.