EVALUATION OF ARCHITECTURAL SUPPORT FOR GLOBAL ADDRESS-BASED COMMUNICATION IN LARGE-SCALE PARALLEL MACHINES

Large-scale parallel machines are incorporating increasingly sophistic ated architectural support for user-level messaging and global memory access. We provide a systematic evaluation of a broad spectrum of curr ent design alternatives based on our implementations of a global addre ss language on the Thinking Machines CM-5, Intel Paragon, Meiko CS-2, Gray T3D, and Berkeley NOW. This evaluation includes a range of compil ation strategies that make varying use of the network processor; each is optimized for the target architecture and the particular strategy. We analyze a family of interacting issues that determine the performan ce tradeoffs in each implementation, quantify the resulting latency, o verhead, and bandwidth of the global access operations, and demonstrat e the effects on application performance.