ANALOG IMPLEMENTATION OF THE FDTS DF DETECTION ALGORITHM FOR MAGNETICRECORDING/

Authors
JAWORSKI RV HARJANI R
Citation
Rv. Jaworski et R. Harjani, ANALOG IMPLEMENTATION OF THE FDTS DF DETECTION ALGORITHM FOR MAGNETICRECORDING/, IEEE transactions on magnetics, 32(5), 1996, pp. 3944-3946
Citations number
10
Categorie Soggetti
Engineering, Eletrical & Electronic","Physics, Applied
Journal title
IEEE transactions on magnetics → ACNP
ISSN journal
00189464
Volume
32
Issue
5
Year of publication
1996
Part
1
Pages
3944 - 3946
Database
ISI
SICI code
0018-9464(1996)32:5<3944:AIOTFD>2.0.ZU;2-E
Abstract
An analog implementation of the fixed delay tree search algorithm for magnetic recording detection is presented. The circuit is designed usi ng a 1.2um BiCMOS process with NPN devices with an f(t) of 12GHz, and provides a reference for the feasibility of an analog implementation. Composite simulation results of all the system blocks suggest operatin g speeds in excess of 100MSamples/s with a total power consumption of less than 1W.