PROGRAMMABLE HARDWARE ARCHITECTURES FOR SENSOR VALIDATION

A previous paper (Henry, 1995a) introduced the technique of hardware c ompilation as the basis for developing highly flexible programmable ha rdware platforms for control applications such as sensor validation. T his paper describes two PC-hosted architectures for sensor validation research. The first holds up to two FPGAs and supports a daughter boar d with application-specific circuitry. The second is based on the tran sputer TRAM standard, and consists of programmable hardware modules pr oviding interfacing and low-level signal processing between the transp uter and arbitrary I/O components. Three applications are described, b ased upon a thermocouple, a dissolved oxygen probe and a Coriolis mass flow meter.