MINIMAL PIPELINE ARCHITECTURE - AN ALTERNATIVE TO SUPERSCALAR ARCHITECTURE

Pipelining is used in almost all recent processor architectures to inc rease the performance. It is, however, difficult to achieve the theore tical speedup of pipelining, because code dependencies cause delays in execution. Superscalar processor designers must use complex technique s like forwarding, register renaming and branch prediction to reduce t he loss of performance due to this problem. In this paper we outline a nd evaluate abstract Minimal Pipeline Architecture (MPA) featuring cro ss-bar interconnect of functional units and special two level pipelini ng. According to our evaluation MPA is not more complex than a basic s uperscalar architecture using out of order execution, but offers remar kably better performance.