Jp. Hurst et Ad. Singh, A DIFFERENTIAL BUILT-IN CURRENT SENSOR DESIGN FOR HIGH-SPEED IDDQ TESTING, IEEE journal of solid-state circuits, 32(1), 1997, pp. 122-125
A new built-in current sensor design for IDDQ testing is presented in
this paper, Our design overcomes performance limitations encountered b
y previous sensors by using a novel differential architecture which al
lows early and accurate detection of abnormal quiescent current follow
ing the switching transient, This differential design also naturally c
ompensates for inaccuracies due to any build up of leakage currents an
d subthreshold conduction effects when relatively large circuit partit
ions are tested, A test circuit utilizing the sensor in a built-in sel
f-test environment has been fabricated, At clack speeds of up to 31.25
MHz the sensor accurately detects all six of the defects that were im
planted in the test chip, SPICE3 simulations of the circuit indicate t
hat with careful design, this sensor can accurately detect faults at o
perational speeds in a variety of situations.