P. Lippens et al., A VIDEO SIGNAL PROCESSOR FOR MOTION-COMPENSATED FIELD-RATE UP-CONVERSION IN CONSUMER TELEVISION, IEEE journal of solid-state circuits, 31(11), 1996, pp. 1762-1769
An IC for 100-Hz television has been realized implementing motion esti
mation and compensation algorithms for high-quality upconversion and a
judder-free motion portrayal of movie material. The four embedded vid
eo signal processors on this IC provide a processing power of 10 giga-
operation per second (GOPS). Their architecture was generated from an
algorithm description using behavioral synthesis, The required 25-Gb/s
memory bandwidth was realized by embedding 24 single/dual port SRAM/D
RAM instances, The test approach includes full scan, boundary scan, fu
nctional testing, built-in-self-test, and IDDq-test. The so-called ''N
atural Motion'' feature implemented by this IC was demonstrated at the
IFA '95 and received the European Video Innovation Award 95-96.