LOW-POWER VIDEO ENCODER DECODER CHIP SET FOR DIGITAL VCRS/

This paper describes the realization of a video encoder/decoder chip s et for the consumer-use digital video cassette recorder (VCR), The two chips with a 5 Mb external DRAM either encode the CCIR601 digital com ponent video signal into the standard-definition digital VCR (DV) form at or decode the DV format signal into a component video signal, The c ompression rate of the intraframe compression is about 1/6. The total power dissipation of the two LSI's is 142 mW at 2 V internal supply vo ltage, which is more than one order of magnitude smaller than the rece ntly reported MPEG2 (MP@ML) encoder systems, Low power was achieved pr imarily due to the compression scheme which is optimized for large-sca le integration (LSI) implementation, The 0.5-mu m 2-V CMOS standard ce ll library was also effective in reducing the power consumption, Each chip, fabricated in two-layer metal 0.5-mu m CMOS technology, contains about 500 k transistors on 71 mm(2) and 79 mm(2) die, respectively.