A FORMULATION FOR ANALOG BEHAVIORAL-LEVEL SENSITIVITY AND STEADY-STATE ANALYSIS

The synthesis and verification of larger analog systems in the context of mixed signal ASICs requires formulation of simulation and analysis methods at the analog behavioral level. In this paper we present a fo rmulation for sensitivity and steady state analysis of analog systems at the behavioral level. This formulation is useful for analysis and d esign space exploration of higher-level analog architectures synthesiz ed from behavioral specifications. Conventional methods are formulated within the context of;circuit level simulators such as SPICE, forcing the designer to model systems in terms of primitive circuit-level equ ivalent circuits thereby taking away advantages of higher level system modeling and simulation.