A BIST-DFT TECHNIQUE FOR DC TEST OF ANALOG MODULES

Among test technique for analog circuits, DC test is one of the simple st method for BIST application since easy to integrate test pattern ge nerator and response analyzer are conceivable. Precisely, this paper p resents such an investigation for a CMOS operational amplifier that is latter extended to active analog filters. Since the computation of fa ult coverage is still a controversy question for analog cells, we deve lop first an evaluation technique for optimizing the tolerance band of the measurements to test. Then, using some DFT solutions we derive si ngle DC pattern and discuss the minimal number of points to test for t he detection of defects. A response analyzer is integrated with a Buil t-In Voltage Sensor (BIVS) and provides directly a logic pass/fail tes t result. Finally, the extra circuitry introduced by this BIST techniq ue for analog modules does not exceed 5% of the total silicon area of the circuit under test and detects most of the faults.