LOW-POWER DESIGN FOR DSP - METHODOLOGIES AND TECHNIQUES

Power dissipation is becoming a limiting factor in the realization of VLSI systems. The principal reasons for this are maximum operating tem perature and, for portable applications, battery life. Because of the relatively greater complexity, the power dissipation in digital signal processing (DSP) applications is of special significance, and low pow er design techniques are now emerging. This paper provides an overview of the techniques and methodologies that have emerged in the past few years for DSP system design. These include techniques for minimizing power at architectural and algorithmic levels including DSP programmin g issues. In addition, the paper indicates some potential design direc tions. Copyright (C) 1996 Elsevier Science Ltd.