SILICON MOSFETS ON INSULATOR WITH LITHOGRAPHY-INDEPENDENT 100 NM CHANNEL-LENGTH

Future field-effect transistors should have control regions - also cal led channels or barriers - of a few tens of nanometers to achieve a tr ansconductance of 1 S/mm and beyond, f(T) of 100 GHz and safe operatin g voltages beyond 1 V. This paper presents two approaches for the fabr ication of such MOS transistors in silicon on insulator (SOI) on today 's average technology lines without resorting to nanometer lithography , but rather using differential doping available in reduced-temperatur e epitaxy and implantation. With 6 nm oxynitride gate dielectrics, inn er transconductances of 700 mS/mm at room temperature are reported. Co pyright (C) 1996 Elsevier Science Ltd.