K. Chakrabarty et Jp. Hayes, TEST RESPONSE COMPACTION USING MULTIPLEXED PARITY TREES, IEEE transactions on computer-aided design of integrated circuits and systems, 15(11), 1996, pp. 1399-1408
Built-in self-testing requires test response streams from many observa
tion points to be merged (space compaction) and compressed (time compa
ction) into a short signature, The compaction circuits should be trans
parent to error propagation in order to minimize aliasing, which occur
s when a faulty response maps to the fault-free signature, We investig
ate the use of multiplexed parity trees (MPT's) for zero-aliasing spac
e compaction. MPT's combine the error propagation properties of multip
lexers and parity trees, and ensure zero aliasing via multistep compac
tion, We present two design techniques based on MPTs-output selection
and fanout insertion-that eliminate aliasing for both deterministic an
d pseudorandom test sets, Our experiments with the ISCAS benchmark cir
cuits show that zero aliasing can be achieved with small test sets and
moderate hardware overhead. We also demonstrate that a very high perc
entage of single stuck-line faults in the compaction circuit are detec
ted by the test patterns applied to the circuit under test.