BBS RESULTS FOR THE IPSC 2 AND IPSC 860

Citation
Rf. Fowler et al., BBS RESULTS FOR THE IPSC 2 AND IPSC 860, Future generations computer systems, 11(1), 1995, pp. 49-59
Citations number
8
Categorie Soggetti
Computer Science Theory & Methods
ISSN journal
0167739X
Volume
11
Issue
1
Year of publication
1995
Pages
49 - 59
Database
ISI
SICI code
0167-739X(1995)11:1<49:BRFTI2>2.0.ZU;2-U
Abstract
We present results for the BECAUSE Benchmark Set (BBS) on two machines , the Intel iPSC/2 and iPSC/860. These computers are of similar design and architecture, both being MIMD machines with processors connected together in a hypercube topology and supporting efficient through rout ing of messages. The software environment on the two machines is also very similar with support for a range of basic communication operation s. The main difference between the machines lies in the processor used on each node, which on the iPSC/2 is an Intel 386 (plus FPU) while th e iPSC/860 uses a state of the art i860 chip. It is shown that the bas ic floating point performance of the iPSC/2 is no longer competitive w ith current workstations such as the IBM RS6000/320. On the other hand , a single node of iPSC/860 is found to give comparable performance to such workstations. The communication performance of the machines for long messages is very similar (2.8 Mbytes/sec.), which is reasonable f or the iPSC/2 but is found to present problems on the iPSC/860 in some of the benchmark tests. Results for other aspects of communication pe rformance including overlap with computation and access to the concurr ent file system are also presented. The scalability of the performance when using multiple nodes on both machines is examined for the Class 2 and 3 BBS tests and comparisons made with the reference machine. Som e aspects of the implementations used for the parallel versions of the tests are discussed.