The longitudinal stress distribution in GaAs/Si heterostructure was ca
lculated using improved shear lag analysis. In this analysis, it is as
sumed that each layer consists of many imaginary thin layers in order
to calculate internal stress distributions over the entire the heteros
tructure. This method is applied to stress calculation in a GaAs/Si he
terostructure whose GaAs layer has cracks, in order to determine the e
ffect of cracks on the reduction of stress in the wafer. In the stress
distribution in the Si layer close to the heterointerface, a sharp an
d deep valley of compressive stress appears near cracks. The stress be
tween cracks is maximum in the Si and GaAs layers. The stress in the G
aAs layer can be clearly reduced by introducing cracks regardless of w
afer length, and it can be greatly reduced by shortening the distance
between cracks. The reduction becomes marked for distance less than 10
0 mu m.