We have investigated the basic characteristics of capacitively and res
istively coupled single-electron tunneling (SET) inverters as a digita
l logic circuit. Static and dynamic characteristics have been calculat
ed based on the semiclassical model using the Monte Carlo method. Alth
ough a voltage gain larger than unity is found even in a cascade conne
ction of two stages of the SET inverters, they reveal some disadvantag
es in digital logic application, such as small voltage gain, poor inpu
t-output separation, small logic level difference, instability of oper
ating point and oscillating output voltages. The switching delay time
is estimated to be on the order of 100RC, where R and C is resistance
and capacitance of a tunnel junction, respectively. The stability of l
ogic voltage levels has also been verified in cross-coupled latch circ
uits.