A CMOS 2.4-GBPS 16X16 ATM SWITCH CHIP SET

Citation
H. Hisamatsu et al., A CMOS 2.4-GBPS 16X16 ATM SWITCH CHIP SET, NEC research & development, 35(4), 1994, pp. 458-469
Citations number
NO
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
ISSN journal
0547051X
Volume
35
Issue
4
Year of publication
1994
Pages
458 - 469
Database
ISI
SICI code
0547-051X(1994)35:4<458:AC21AS>2.0.ZU;2-4
Abstract
The authors have developed a CMOS chip set for a 2.4 Gbps 16 x 16 ATM switch. In order to realize higher link speed and more maximum switch throughput than past development ATOM (ATM Output buffer Modular switc h), a parallel-bit synchronization scheme without external timing adju stment, ECL-compatible I/O buffers and a newly LSI package that has th in film termination resistors have been developed. This chip set consi sts of three LSI chips with 0.55 mu m CMOS technology. From the result of evaluation of these LSI chips, the authors have achieved a link sp eed of 2.4 Gbps.