HELICAL LATCH FOR SCALABLE BOOLEAN LOGIC OPERATIONS

Citation
R. Demara et al., HELICAL LATCH FOR SCALABLE BOOLEAN LOGIC OPERATIONS, Nanotechnology, 5(3), 1994, pp. 137-156
Citations number
3
Categorie Soggetti
Engineering,"Physics, Applied
Journal title
ISSN journal
09574484
Volume
5
Issue
3
Year of publication
1994
Pages
137 - 156
Database
ISI
SICI code
0957-4484(1994)5:3<137:HLFSBL>2.0.ZU;2-C
Abstract
Nanomechanical computing elements which employ rotational symmetry and motion are designed and analyzed using a bounded continuum model. Fir st, the Boolean logic functions of NOT, AND, OR, and XOR are realized using a helical latch, reset springs, and rod assemblies. Building upo n these components, designs for shifters and two-level logic devices a re developed. The helical latching mechanism calculates the Boolean ou tput function as a positional displacement from a known reset state, w hich occurs exactly once during each 360-degrees instruction cycle. Op erations of arbitrary word length can be performed by subdividing the logic disc into sectors where each sector operates on a single bit. Th roughput can be increased by pipelining multiple-bit operands to yield a speedup which approaches a maximum value of (n + 2) as compared to a single-level of non-pipelined logic with n inputs. Generally, speedu p is bounded by (n + 2)/p where p denotes the number of cycles between initiations of the pipe. An analysis of gate kinematics is performed to determine the device geometries and maximum operating frequencies f or both non-pipelined and pipelined operation.