A PWL LADDER CIRCUIT WHICH EXHIBITS HYSTERESIS

Authors
PARODI M STORACE M CINCOTTI S
Citation
M. Parodi et al., A PWL LADDER CIRCUIT WHICH EXHIBITS HYSTERESIS, International journal of circuit theory and applications, 22(6), 1994, pp. 513-526
Citations number
11
Categorie Soggetti
Engineering, Eletrical & Electronic
Journal title
International journal of circuit theory and applications → ACNP
ISSN journal
00989886
Volume
22
Issue
6
Year of publication
1994
Pages
513 - 526
Database
ISI
SICI code
0098-9886(1994)22:6<513:APLCWE>2.0.ZU;2-A
Abstract
A circuit model for static hysteresis is presented. The circuit has a ladder structure with linear capacitors and piece wise linear resistor s. The model behaviour shows all basic characteristics of static hyste resis phenomena. The model is put into relation with others proposed i n the literature. An analysis of the model properties and a detailed c omparison with the static Preisach model are made.