A VIDEO-RATE 10-B TRIPLE-STAGE BI-CMOS A D CONVERTER/

This paper describes the circuit design and experimental results of a video-rate 10-b analog-to-digital converter (ADC) suitable for consume r video products, such as high-definition TV sets. Triple-stage conver sion scheme combined with two new conversion methods, ''Dynamic Slidin g Reference Method'' and ''Triangular Interpolation Method,'' and an i nternal Bi-CMOS Sample/Hold circuit have been developed. These convers ion methods require no adjustment circuit to fit reference voltages be tween conversion stages and realize small active area. As a result, a maximum conversion frequency of 16 MHz, acceptable SNRs of 56 dB and 4 8 dB for 10 kHz and 8 MHz input frequency respectively and small DNLE of 0.75 LSB have been achieved. This ADC is fabricated with 1.2 mu m B i-CMOS technology and integrates very small number of bipolar transist ors of 2 K on a small active area of 2.5 X 2.7 mm(2) and consumes 350 mW.