S. Yoshioka et al., A RADIATION-HARDENED 32-BIT MICROPROCESSOR-BASED ON THE COMMERCIAL CMOS PROCESS, IEEE transactions on nuclear science, 41(6), 1994, pp. 2481-2486
A radiation-hardened 32-bit microprocessor based on the commercial CMO
S process, usable up to 1 kGy(Si), has been developed by (1) adding a
silicon nitride passivation layer and (2) thinning the field oxide. Bo
th techniques suppress the leakage current generated by the parasitic
MOSFET, because its negative threshold voltage shift due to oxide trap
ped holes is decreased by the-latter, and compensated by the positive
shift due to the interface states generated during irradiation by hydr
ogen napped in the oxide through the silicon-nitride deposition. The s
amples supplied with 4.5 V and 20 MHz clock were able to operate norma
lly up to the total dose of 1.3 kGy(Si). The total dose tolerance of t
he samples was over 20 times as much as that of ones based on the comm
ercial process.