OPTIMIZING POWER USING TRANSFORMATIONS

The increasing demand for portable computing has elevated power consum ption to be one of the most critical design parameters. A high-level s ynthesis system, HYPER-LP, is presented for minimizing power consumpti on in application specific datapath intensive CMOS circuits using a va riety of architectural and computational transformations. The synthesi s environment consists of high-level estimation of power consumption, a library of transformation primitives, and heuristic/probabilistic op timization search mechanisms for fast and efficient scanning of the de sign space. Examples with varying degree of computational complexity a nd structures are optimized and synthesized using the HYPER-LP system. The results indicate that more than an order of magnitude reduction i n power can be achieved over current-day design methodologies while ma intaining the system throughput; in some cases this can be accomplishe d while preserving or reducing the implementation area.