INGAASP CHANNEL HFETS ON INP FOR OEIC APPLICATIONS

A model for the calculation of the input noise of a high impedance pho toreceiver is proposed, taking into account the contributions of low-f requency characteristics of the FET. Simulations based on this approac h show that excess gate leakage current and low-frequency excess noise , usually observed in InGaAs channel FET's, strongly penalize the phot oreceiver sensitivity far low to medium data rates, New InGaAsP channe l HFET's have been developed and fabricated to solve those problems, d e measurements on 1 x 100 mu m(2) gate HFET's show good I-ds-V-ds char acteristics with associated gate leakage currents lower than 200 nA, P romising ft of 18 GHz and f(max) of 40 GHz have been recorded on 0.5 x 200 mu m(2) gate transistors, Low-frequency gate and channel noise me asurements demonstrate the suitability of InGaAsP channel HFET structu re and technology for low noise applications. A hybrid pin-HFET high i mpedance photoreceiver has been assembled with a 1 x 150 mu m(2), gate transistor, A very close agreement is found between photoreceiver inp ut noise predicted by our model and experimental results, Record sensi tivities of -34.8 dBm at 622 Mbit/s and -28.7 dBm at 2.5 Gbit/s are in ferred from noise measurements, confirming the strong potential of InG aAsP channel HFET's for the fabrication of high sensitivity photorecei vers operating at moderate data rates.