TEACHING VLSI TESTING AT UNIVERSITY-PARIS -VI

Citation
A. Derieux et al., TEACHING VLSI TESTING AT UNIVERSITY-PARIS -VI, Onde electrique, 75(1), 1995, pp. 14-17
Citations number
NO
Categorie Soggetti
Telecommunications,"Engineering, Eletrical & Electronic
Journal title
ISSN journal
00302430
Volume
75
Issue
1
Year of publication
1995
Pages
14 - 17
Database
ISI
SICI code
0030-2430(1995)75:1<14:TVTAU->2.0.ZU;2-C
Abstract
A complete course on teaching logical testing at university Pam's 6 is dedicated to postgraduate students and focuses on the test problem du ring design process and after fabrication on an ASIC (Application Spec ific Integrated Circuit). It takes place after an initiation course on CMOS VLSI design where students are required to design and implement an AMD2901 [1] compatible processor with a scan-path approach. The cir cuit is design both with the ALLIANCE [3] tools (a complete set of CAD tools for teaching VLSI design developped at laboratory CAO & VLSI/MA SI) and tools provided by the CNFM (Comite National de Formation en Mi croelectronique) and EUROCHIP. Practical works last three weeks with f our hours per week with teachers. During the past three years, about t hirty students per year have followed this courses.