Bs. Cherkauer et Eg. Friedman, DESIGN OF TAPERED BUFFERS WITH LOCAL INTERCONNECT CAPACITANCE, IEEE journal of solid-state circuits, 30(2), 1995, pp. 151-155
This paper presents a design methodology and analytic relationships fo
r the optimal tapering of cascaded buffers which consider the effects
of local interconnect capacitance. The method, constant capacitance-to
-current ratio tapering (C3 RT), is based on maintaining the capacitiv
e load to current drive ratio constant, and therefore, the propagation
delay of each buffer stage also remains constant. Reductions in power
dissipation of up to 22% and reductions in active area of up to 46%,
coupled with reductions in propagation delay of up to 2%, as compared
with tapered buffers which neglect local interconnect capacitance, are
exhibited for an example buffer system.