ALIASING COMPUTATION USING FAULT SIMULATION WITH FAULT DROPPING

Citation
I. Pomeranz et Sm. Reddy, ALIASING COMPUTATION USING FAULT SIMULATION WITH FAULT DROPPING, I.E.E.E. transactions on computers, 44(1), 1995, pp. 139-144
Citations number
21
Categorie Soggetti
Computer Sciences","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
ISSN journal
00189340
Volume
44
Issue
1
Year of publication
1995
Pages
139 - 144
Database
ISI
SICI code
0018-9340(1995)44:1<139:ACUFSW>2.0.ZU;2-Z
Abstract
It is generally thought that accurate analysis of aliasing requires no n-fault dropping fault simulation. We show that fault dropping is poss ible when computing the exact aliasing of modeled faults for common ou tput response compression circuits. The fault dropping process is most effective when the test set size is small. Extensions to large test s ets are also considered. We present a fault simulation procedure that takes maximum advantage of fault dropping and present experimental res ults to support its effectiveness.