CONSTRUCTION TECHNIQUES FOR SYSTEMATIC SEC-DED CODES WITH SINGLE BYTEERROR-DETECTION AND PARTIAL CORRECTION CAPABILITY FOR COMPUTER MEMORY-SYSTEMS

This correspondence proposes three new techniques to construct a class of codes that extends the protection provided by previous single erro r correcting (SEC)-double error detecting (DED)-single byte error dete cting (SBD) codes. The proposed codes are systematic odd-weight-column SEC-DED-SBD codes providing also the correction of any odd number of erroneous bits per byte, where a byte represents a cluster of b bits o f the codeword that are fed by the same memory chip or card. These cod es are useful for practical applications to enhance the reliability an d the data integrity of byte-organized computer memory systems against transient, intermittent, and permanent failures. In particular, they represent a good tradeoff between the overhead in terms of additional check bits and the reliability improvement, due to the capability to c orrect at least 50% of the multiple errors per byte.