EFFICIENT REALIZATIONS OF THE DISCRETE AND CONTINUOUS WAVELET TRANSFORMS - FROM SINGLE-CHIP IMPLEMENTATIONS TO MAPPINGS ON SIMD ARRAY COMPUTERS

This paper presents a wide range of algorithms and architectures for c omputing the 1-D and 2-D discrete wavelet transform (DWT) and the 1-D and 2-D continuous wavelet transform (CWT). The algorithms and archite ctures presented here are independent of the size and nature of the wa velet function. New on-line algorithms are proposed for the DWT and th e CWT that require significantly small storage. The proposed systolic array and the parallel filter architectures implement these on-line al gorithms and are optimal both with respect to area and time (under the word-serial model). Moreover, these architectures are very regular an d support single chip implementations in VLSI. The proposed SIMD archi tectures implement the existing pyramid and a'trous algorithms and are optimal with respect to time.