THE SUPERSCALAR ARCHITECTURE OF THE MC68060

Authors
CIRCELLO J EDGINGTON G MCCARTHY D GAY J SCHIMKE D SULLIVAN S DUERDEN R HINDS C MARQUETTE D SOOD L CROUCH A CHOW D
Citation
J. Circello et al., THE SUPERSCALAR ARCHITECTURE OF THE MC68060, IEEE MICRO, 15(2), 1995, pp. 10-21
Citations number
10
Categorie Soggetti
Computer Sciences","Computer Science Hardware & Architecture","Computer Science Software Graphycs Programming
Journal title
IEEE MICRO → ACNP
ISSN journal
02721732
Volume
15
Issue
2
Year of publication
1995
Pages
10 - 21
Database
ISI
SICI code
0272-1732(1995)15:2<10:TSAOTM>2.0.ZU;2-I
Abstract
As the newest member of the 68000 microprocessor family, the MC68060 m icroprocessor offers a cost-effective, power-thrifty solution for high -performance embedded processing applications. This article focuses on its microarchitectural features, such as superscalar pipeline impleme ntation, that enable it to achieve its high-performance objectives whi le maintaining 68000 user-code compatability. Running at 50 and 66 MHz , the first 3.3V implementations achieve 103 Dhrystone MIPS performanc e at 66 MHz.