Mst. Benten et al., RTL STRUCTURAL SYNTHESIS FROM BEHAVIORAL DESCRIPTIONS IN A UNIX ENVIRONMENT, Arabian journal for science and engineering, 19(4B), 1994, pp. 783-803
High level synthesis refers to the process of synthesizing the hardwar
e of a digital system from a high level description. This paper presen
ts an integrated system which accepts as input a purely behavioral des
cription expressed in the ''bc'' language and transforms it into hardw
are (IC layout). The bc description is first transformed into a stack
representation which is used to generate an optimized RTL description
in the AHPL language. The AHPL description is finally synthesized into
hardware.