As computer and communication systems become more complex it becomes i
ncreasingly more difficult to analyze their hardware reliability, beca
use simple models can fail to adequately-capture subtle but important
features. This paper describes several ways we have addressed this pro
blem for analyses based upon White's SURE theorem. We show: how reliab
ility analysis based on SURE mathematics can attack very large problem
s by accepting recomputation in order to reduce memory usage how such
analysis can be parallelized both on multiprocessors and on networks o
f ordinary workstations, and obtain excellent performance gains by doi
ng so how the SURE theorem supports efficient Monte Carlo based estima
tion of reliability the advantages of the method. Empirical studies of
large models solved using these methods show that they are effective
in reducing the solution-time of large complex problems.