SCALABLE CACHE CONSISTENCY FOR HIERARCHICALLY STRUCTURED MULTIPROCESSORS

This paper presents a new cache consistency scheme for hierarchically structured shared-memory multiprocessors. The scheme is simple, fast a nd efficient, and it does not require a large amount of state informat ion to be maintained. The scheme exploits the broadcast capability of these systems, but limits the extent of the broadcasts by means of a n ovel filtering mechanism. As a specific example, it is shown how the p roposed cache consistency scheme can be implemented on the Hector mult iprocessor architecture. Using trace-driven simulations, we demonstrat e that the scheme is scalable and performs well for common application s.