PROTEUS - A RECONFIGURABLE COMPUTATIONAL NETWORK FOR COMPUTER VISION

The Proteus architecture is a highly parallel, multiple instruction, m ultiple data machine (MIMD) optimized for large granularity tasks such as machine vision and image processing. The system can achieve 20 gig aflops (80 gigaflops peak). It accepts data via multiple serial links at a rate of up to 640 MB/s. The system employs a hierarchical reconfi gurable interconnection network with the highest level being a circuit -switched enhanced hypercube, serial interconnection network for inter nal data transfers. The system is designed to use 256 to 1024 RISC pro cessors. The processors use 1-MB external read/write allocating caches for reduced multiprocessor contention. The system detects, locates, a nd replaces faulty subsystems using redundant hardware to facilitate f ault tolerance. The parallelism is directly controllable through an ad vanced software system for partitioning, scheduling, and development. System software includes a translator for the INSIGHT language, a para llel debugger, low- and high-level simulators, and a message-passing s ystem for all control needs. Image-processing application software inc ludes a variety of point operators, neighborhood operators, convolutio n, and the mathematical morphology operations of binary and gray-scale dilation, erosion, opening, and closing.