WEAROUT AND BREAKDOWN IN THIN SILICON-OXIDE

A model describing how wearout leads to breakdown in thin silicon oxid es has been developed. During wearout traps are generated inside of th e oxide and at the oxide interfaces. In oxides thinner than 20 nm the dominant trap generation mechanism is determined by high field emissio n processes and not impact ionization. Locally higher current densitie s through the traps generated during wearout lead to local breakdown. This model is critically dependent on measurement of the traps generat ed inside of the oxide during the wearout and the measurement of these traps is described. The random nature of the wearout process is relat ed to the statistical breakdown distributions. The ability of this mod el to describe oxide charging, low-level leakages, transient currents, the role of asperities, polarity dependences, and the fluence, time, thickness, voltage, and temperature dependences of oxide breakdown dis tributions are described.