EFFICIENT IMPLEMENTATION TECHNIQUES FOR GRACEFULLY DEGRADABLE MULTIPROCESSOR SYSTEMS

We propose the dynamic reconfiguration network (DRN) and a monitoring- at-transmission (MAT) bus to support dynamic reconfiguration of an N-m odular redundancy (NMR) multiprocessor system. In the reconfiguration process, a maximal number of processor triads are guaranteed to be for med on each processor cluster, thus supporting gracefully degradable o perations. This is made possible by dynamically routing the control an d clock signals of processors on the DRN so as to synchronize fault-fr ee processors. The MAT bus is an efficient way to implement a triple m odular redundant (TMR) pipeline voter (PV), which is a special case of the voting network proposed in [1]. Extensive experimental results ha ve shown to support our design concept, and the performance of differe nt cache memory organizations is evaluated through an analytic model.