EVALUATING THE SAFETY OF SELF-CHECKING CIRCUITS

In this paper, we consider the evaluation of the safety of a self-chec king circuit with combinational logic. Since the circuit is tested und er normal operation, it may stay in different states such as a perfect state in which any erroneous output can be detected, unstable states in which an erroneous output may be detected or may not, a safe-state when the erroneous output has been caught, and a fail-state because th e erroneous output is undetected, as time goes on. Consequently, we pr opose a fail-safe evaluation, using a Markov model to describe the sta te transitions and predicate the probability of the circuit not being in the fail-state. We include a comparison with existing evaluation me thods, the proposed approach being more practical because it estimates the safety of the circuit, which is reducing as time goes on, instead of giving a constant probability measure.