K. Challapali et al., GRAND ALLIANCE MPEG-2-BASED VIDEO DECODER WITH PARALLEL-PROCESSING ARCHITECTURE, International journal of imaging systems and technology, 5(4), 1994, pp. 263-267
A practical and unique hardware architecture for video bitstream sourc
e decoding and video postprocessing of a Moving Pictures Expert Group
(MPEG-2)-based high-definition television (HDTV) compressed bitstream
has been implemented to impose minimal limitations on the video source
coding algorithm. The Grand Alliance (GA) MPEG-2-based HDTV codec ach
ieves a high degree of source and channel coding efficiency while pres
erving the delivery of high-resolution picture quality in a variety of
video input and output formats in bandwidth-limited channels. The vid
eo source decoder hardware architecture necessary to achieve the data
decoding and ensuing video postprocessing poses numerous technologic c
hallenges to the system designer, who must tradeoff minimizing codec c
onstraints with the eventual commercialization of a video decoder for
a consumer television receiver product. The powerful and flexible codi
ng algorithm necessary to satisfy the HDTV picture quality and transmi
ssion channel bandwidth limitation requirements results in an encoder
output bitstream that necessitates high throughout decoding. Although
the transmitted bitstream is of constant rate due to rate buffering, b
itstreams internal to the codec are both peaky and bursty. An intellig
ent distributive parallel processing decoding architecture has been de
veloped to dynamically partition the MPEG-2 bitstream into a number of
decodable subset bitstreams, while placing minimal constraints on the
encoding algorithm. This architecture allows for high-speed, efficien
t decoding of the bitstream, and can be a prelude to the development o
f a cost-effective consumer product. Further architecture refinements
can be explored, including implementation in VLSI. (C) 1995 John Wiley
and Sons, Inc.