ON DICTIONARY-BASED FAULT LOCATION IN DIGITAL LOGIC-CIRCUITS

In this work, fault location based on a fault dictionary is considered at the chip level. To justify the use of a precomputed dictionary in terms of computation time, the computational effort invested in comput ing a dictionary is first analyzed. The number of circuit diagnoses th at need to be performed dynamically, without the use of precomputed kn owledge, before the overall diagnosis effort exceeds the effort of com puting a dictionary, is studied. Experimental results on ISCAS-85 circ uits show that for relatively small numbers of diagnoses, a precompute d dictionary is more efficient than dynamic diagnosis. Next, a method to derive small dictionaries without losing resolution of modeled faul ts is proposed, based on extended pass/fail analysis. The same procedu re is applicable for selecting internal observation points to increase the resolution of the test set. Methods to compact the resulting dict ionary further, using compaction techniques generally applied to fault detection, are then described. Experimental results are presented to demonstrate the effectiveness of the proposed methods.