ENERGY-CONSUMPTION MODELING AND OPTIMIZATION FOR SRAMS

The recent trends in portable computing technologies have established the need for energy efficient design strategies, To achieve minimum en ergy design goals, system designers need a technique to accurately mod el the energy consumption of their design alternatives without perform ing a full physical design and full-circuit simulation, This paper pre sents and compares five approaches for modeling the energy consumption of CMOS circuits, These five modeling approaches have been chosen to represent the various levels of model complexity and accuracy found in the current literature, These modeling approaches are applied to the energy consumption of SRAM's to provide examples of their use and to a llow for the comparison of their modeling qualities, It was found that a mixed characterization model-using a CV2 prediction for digital sub sections and fitted simulation results for the analog subsections-is s atisfactory (within +/-1 process variation) for predicting the absolut e energy consumed per cycle, This same model is also very good (within 2%) for predicting an optimum organization for the internal structure s of the SRAM, Several common architectures and circuit designs for SR AM's are analyzed with these models, This analysis shows that global, rather than local improvements, produce the largest energy savings.