EFFICIENT REALIZATIONS OF SQUARING CIRCUIT AND RECIPROCAL USED IN ADAPTIVE SAMPLE RATE NOTCH FILTERS

Adaptive sample rate filtering has been shown to be an efficient and e ffective method of removing narrowband interference from broadband com munication signals. The expression for the gradient for adaptive sampl e rate filtering is expressed in terms of the traditional adaptive fil ter gradient. Adaptive algorithms frequently use divide and square ope rations. Rather than implementing a generic multiplier in the adaptive section for the adaptive sample rate notch filter, we have developed a technique of optimizing an implementation of the squarer. In the seq uential reciprocal circuit presented, we show how a numerator (scaling ) can be easily incorporated into its design to achieve a general purp ose divider. A Synopsis-synthesized VHDL description of a parallel rec iprocal circuit is included for comparison. Both realizations have bee n demonstrated in an adaptive sample rate notch filter which has been downloaded into a single Xilinx XC4010 reconfigurable Field Programmab le Gate Array (FPGA).