CRACKING FAILURES IN LEAD-ON-CHIP PACKAGES INDUCED BY CHIP BACKSIDE CONTAMINATION

The increasingly severe demands of concurrently increasing die size wh ile reducing package size have made the mechanical stability of novel surface mount technologies a primary concern, Package cracks induced b y interfacial delamination between the chip backside surface and the e poxy molding resin are a major failure mode in Lead-On-Chip (LOC) pack ages, This interfacial delamination is caused by contamination of the backside surface by the wafer tape adhesive, The physical and chemical parameters of the backside surface and tape adhesive which lead to in terfacial delaminations in LOC packages are described along with a met hod to alleviate the problem, To investigate which adhesive attributes impacted interfacial delamination, wafer tape adhesive samples were p repared with a variety of different base polymers, oligomers, cross-li nking agents, photoinitiator, and additives, The degree and type of ba ckside contamination left by these various adhesives was determined,vi th scanning electron microscope (SEM) and scanning acoustic tomography (SAT) techniques, The adhesive and the chip backside surfaces were ch aracterized with viscoelastic, particle count, water contact angle, an d atomic force microscope (AFM) measurements,