Tw. Goodman et al., HIGH-SPEED ELECTRICAL CHARACTERIZATION AND SIMULATION OF A PIN-GRID-ARRAY PACKAGE, IEEE transactions on components, packaging, and manufacturing technology. Part B, Advanced packaging, 18(1), 1995, pp. 163-167
A 181 pin Pin Grid Array (PGA) was characterized using time and freque
ncy domain techniques to identify major sources of signal degradation,
The pins, as well as a layer of plating lines that was included for e
lectroplating the exterior metal surfaces, were found to have a delete
rious effect on the signal transmission within the package, In additio
n, a ground delay resulting from the separation of the signal pin and
its nearest ground pin was seen to cause significant degradation in si
gnal lines whose pin was far from a ground I/O. For signal lines that
are geometrically equivalent due to package symmetry, this effect was
seen to increase with increasing signal/nearest ground pin distance, r
esulting in as much as a 79% increase in the package risetime in some
lines, These effects were simulated using a model whose elements were
based on actual physical structures within the package and whose param
eters were derived from experimental measurements.